Mon 17 Jan 2022 16:05 - 16:35 at Salon I - Program Verification Chair(s): Elizabeth Polgreen

With Proof-Guided Restriction Skipping (PROGRESS) we present a fully automatic and complete approach for Hardware Model Checking under restrictions. We use the PROGRESS approach in the context of PDR/IC3 [9, 18]. Our implementation of PDR/IC3 restricts input signals as well as state bits of a circuit to constants in order to quickly explore long execution paths of the design. We are able to iden- tify spurious proofs of safety along the way and exploit information from these proofs to guide the relaxation of the restrictions. Hence, we greatly improve the capability of PDR to find counterexamples, especially with long error paths. In experiments with HWMCC benchmarks our ap- proach is able to double the amount of detected deep counterexamples in comparison to Bounded Model Checking as well as in comparison to PDR.

Mon 17 Jan

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15:05 - 16:35
Program VerificationVMCAI at Salon I
Chair(s): Elizabeth Polgreen University of Edinburgh
15:05
30m
Paper
High Assurance Software for Financial Regulation and Business PlatformsRemote
VMCAI
Stephen Goldbaum Morgan Stanley, Attila Mihaly Morgan Stanley, Tosha Ellison Fintech Open Source Foundation, Earl Barr UCL, Mark Marron Microsoft Research
15:35
30m
Paper
Loop Verification with Invariants and ContractsRemote
VMCAI
Gidon Ernst Ludwig Maximilian University of Munich
Pre-print
16:05
30m
Paper
Making PROGRESS in Property Directed ReachabilityRemote
VMCAI
Tobias Seufert University of Freiburg, Christoph Scholl University of Freiburg, Arun Chandrasekharan OneSpin Solutions, Munich, Sven Reimer OneSpin Solutions, Munich, Tobias Welp OneSpin Solutions, Munich